What is the meaning of logic gates
NAND operation - negated AND
A combination of an AND gate followed by a NOT gate results in a NAND gate. The output variable Z of the AND gate is negated by the NOT gate and generates the output variable X of the NAND gate. Many logical functions can be solved by using NAND gates. This often increases the number of gates required, with the economic advantage of only using one type of gate.
The output state of a NAND gate results in 1 if not all input states are 1.
NOR link - negated OR
A combination of an OR gate followed by a NOT gate results in a NOR gate. The output variable Z of the OR gate is negated by the NOT gate and generates the output variable X of the NOR gate. NOR gates have the same important meaning as NAND gates in logic circuits.
The output state of a NOR element results in 1 if all input states are 0.
XOR link - Exclusive OR - Antivalence
The logical connection of the XOR gate with two input variables can be described with an 'either - or'. The output variable will always return 'true' if the input variables have different states. The truth table of the XOR gate corresponds to the OR gate with the exclusion of identical input states, i.e. excluding equivalence. This behavior is known as antivalence. There is a circuit symbol standardized in accordance with IEC 60617-12.
If the v is used as a character in the functional equation for the OR link, the XOR link can be underlined by an v be marked. When using the + sign for OR, a plus in the circle ⊕ indicates the XOR link.
The function can be achieved by a circuit with four NAND gates. The following video clip shows the signal flow for the four possible input states for a circuit simulation. Individual control is possible with the help of the fade-in control bar. Circuits with the combination of several NOT, AND and OR gates are uneconomical and are not used in logic circuits.
The output state of an XOR element results in 1 if an odd number of the input states is 1
and all other input states are 0.
XNOR linkage - equivalence
The term equivalence means equivalence. In the case of the XNOR gate with two input variables, the state of the output variable is 1 if both input variables have the same state 0 or 1. The function can be achieved by a circuit with four NOR gates. There are two different symbols to be found. According to IEC 60617-12, the standardized circuit symbol of the XOR gate with negated output shown on the left applies.
The output state of an XNOR element results in 1 if an even number of the input states is 1
and all other input states have 0 or are all 0.
Time diagrams of the gates as a video clip
The video clip shows the switching states in the truth tables and in the timing diagram for the previously described gates with two input variables. Individual process control is possible with the fade-in control bar.
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